About

SPI is led by industry veteran Mike Fister.  Mr. Fister brings nearly 30 years of executive management and engineering experience with semiconductor and software companies to his new position at the helm of Stream Processors.

Most recently, Mr. Fister served as President and Chief Executive Officer of Cadence Design Systems Inc. for 4 years from 2004 to 2008 and led the company to record revenue and operating margin in 2007.  From 2002 to 2004, Mr. Fister served as Senior Vice President and General Manager of Intel’s Enterprise Platforms Group, which designs, markets, and supports building blocks for enterprise computing.  Prior to that, Mr. Fister managed Intel's IA‑32 processor development organization where he was responsible for the design, development, and marketing of IA‑32 processors, including Intel Pentium® Pro, Pentium® II, Pentium® III, Celeron®, Pentium® II Xeon™, and Pentium® III Xeon™ processors.  Mr. Fister was appointed an Intel Vice President in 1996 and elected a Corporate Vice President in 2000.  He was promoted to Senior Vice President in 2002.

Prior to joining Intel, Mr. Fister held executive and engineering management positions at Wyse, Machine Vision International, and Cincinnati Milacron.  Mr. Fister has been a member of the Board of Directors of Synapsense Corporation since December 2006.  He had also been a Director of Cadence Design Systems Inc. from 2004 to 2009 and Autodesk Inc. from 2003 to 2008.  He was a Director of Fabless Semiconductor Association from 2006 to 2007.

He received a bachelor’s degree and a master’s degree in Electrical Engineering from the University of Cincinnati.

Jeff Cashen is Vice President of Worldwide Sales for Stream Processors Inc. (SPI) responsible for developing and executing the customer strategy.

Before joining SPI, Mr. Cashen was vice president of worldwide sales for Ubicom, Inc., a privately held semiconductor company focused on solutions for the digital home. Before that, he was general manager of the switching and network processor business unit at AMCC.< Prior to its acquisition by AMCC, he was vice president of worldwide sales for MMC Networks. Mr. Cashen started his career with Texas Instruments where he spent over 16 years in various sales and sales management positions.

Mr. Cashen holds a bachelor's degree in engineering from Penn State University.

Dr. Dally is currently a Technical Advisor at SPI, a professor in the Computer Science Department at Stanford University, and Chief Scientist of Nvidia Corporation.  Prior to this he was Chairman of the Computer Science Department at Stanford.   At Stanford Dr. Dally spearheaded efforts to develop system and network technology used in most large parallel computers today. He led the Imagine project at Stanford, which introduced the concepts of stream processing and contributed to the T3D, T3E, and BlackWidow supercomputers at Cray.  Prior to Stanford, he was a professor at MIT for 11 years, where his group built the J‑Machine and M‑Machine parallel computers that pioneered programming models and low overhead synchronization and communication mechanisms.

He was also a co‑founder and CTO of Velio Communications, a high-speed interconnect and switch fabric company.  He is a Fellow of the IEEE, the ACM, and the American Academy of Arts and Sciences. He has received numerous honors including the Seymour Cray Award and the Maurice Wilkes Award.  He has published over 200 papers and holds over 50 issued patents.  Dr. Dally has a bachelor’s degree in Electrical Engineering from Virginia Polytechnic Institute, a master’s degree in Electrical Engineering from Stanford and a PhD in Computer Science from Caltech.

As a co-founder and VP of DSP Software, Dr. Kapasi provides technical leadership to all engineering groups.  He also serves on the executive staff, managing the development of core software intellectual property.

Prior to SPI, Dr. Kapasi helped to design and build the original Imagine stream processor at Stanford University.  He also researched and developed many DSP algorithms and complete applications to run on Imagine. 

Dr. Kapasi holds several patents and has published numerous technical articles related to DSP technology.  He earned a bachelor’s degree in engineering from Brown University as well as a master’s degree and a doctorate in electrical engineering from Stanford University.

Brucek Khailany is a co-founder and principal architect at SPI.  Dr. Khailany has been researching parallel processors, power-efficient design, VLSI design methodologies, and computer arithmetic for over 10 years.

Previously, as a member of the team that pioneered research into stream processor architectures at Stanford University, Dr. Khailany led a team in the silicon implementation of the Imagine stream processor, a silicon-proven chip, and demonstrated the scalability potential of the architecture beyond several TeraOps of performance in a single chip.  This research resulted in over 30 publications and several patents on processor architecture and groundbreaking software models for parallel processing.

Prior to Stanford, Dr. Khailany worked as an engineer for several prominent microprocessor companies.  He holds a Ph.D. in Electrical Engineering from Stanford University, and a B.S. in Electrical Engineeering and Computer Engineering from the University of Michigan.

Richard Lucquet brings 14 years of Engineering and Customer experience.

Before joining SPI, he was running Applications Engineering and System QA for Micronas USA, a semiconductor company focused on SoC for the video encoding/decoding market. He was brought in through the acquisition of WISchip. Prior to that, he spent 8 years at Texas Instruments in their Broadband Access Division, taking on various functions from Technical Marketing to System Engineering to Applications and Customer Support. His last tenure at TI was as an Engineering Program manager for integrated CPE solutions including DSL, WLAN and VoIP. 
Mr. Lucquet started his career as a System Engineer at IBM's Networking Hardware Division where he pioneered Voice and Fax over packet on their ATM core switches products.

He holds a M.S.E.E with a double major in Digital Signal Processing and Networking from the University of Nice, France.

Dr. Peter Mattson leads the team developing the SPI IDE, compilers, runtimes, OS, and simulator.

Dr. Mattson is responsible for the original implementation of the stream programming model at Stanford University, which influenced GPU programming languages such as Brook++, CUDA, and OpenCL, as well as SPI’s own SPM. Prior to joining SPI, Dr. Mattson led several DARPA-funded research projects at Reservoir Labs Inc., including an effort to develop an over-arching high-level compiler for architectures developed at MIT, Stanford, and several defense contractors.

Dr. Mattson has a Ph.D. in Electrical Engineering, and a B.S. in EE from the University of Washington.

Kalyan Thumaty brings over 16 years of senior management and engineering experience with semiconductor and EDA companies to his role at Stream Processors. Mr. Thumaty is an accomplished business executive with a proven track record of successfully bringing products and solutions to market in both startups and large organizations.

During his career, Mr. Thumaty led global teams for product and solution development, services delivery, strategic marketing, business development and technical field operations. Prior to Stream Processors, Mr. Thumaty served as Vice President and General Manager at Cadence Design Systems responsible for Cadence Kits & Solutions. Under his leadership, Cadence Kits and Solutions enabled Cadence to transition from point-tools to holistic solutions leading to record revenues and operating margins in FY2007. Prior to leading Cadence Kits, Mr. Thumaty led a Cadence incubation for a new physical design architecture called X Architecture and took it from concept to reality leading to foundry support for X Architecture by TSMC, UMC and multiple IDMs at 130nm, 90nm and 65nm process nodes and adoption of X Architecture for volume production chips by multiple customers. Mr. Thumaty previously served as vice president of world wide applications engineering and services at Simplex Solutions prior to its acquisition by Cadence. At Simplex, Mr. Thumaty led the world-wide field applications engineering team supporting an annual revenue of $50M and was part of the executive management team that took the company public in 2001.Before Simplex, Mr. Thumaty served as Director of Business Management for DSM (Deep Sub-Micron) Services at Cadence Design Systems. Mr. Thumaty also held management positions at Synergy Semiconductor (now Micrel).

Mr. Thumaty holds a M.S.E in electrical engineering from the Arizona State University and B.E in biomedical engineering from Osmania University, India.

Ted Williams brings to SPI more than 20 years of fabless silicon industry experience. At SPI and at several prior companies, he has built the silicon engineering teams, with full responsibility for physical implementation, hierarchical routing and timing methodologies, tapeout planning, and CAD tools.

Prior to SPI, Dr. Williams was the vice president of Silicon Engineering for MorphICs Inc., a cellular wireless silicon developer that was acquired by Infineon Technologies in 2003. Earlier, Dr. Williams was vice president of IC development at Silicon Engines, VLSI chief engineer at HaL Computer Systems (acquired by Fujitsu), and manager of VLSI tools for the microprocessor division of Nexgen/AMD. Concurrent with his industrial positions, Williams was a course lecturer in VLSI circuits and tools at Stanford University, and an invited guest professor at technical institutes in Denmark and Norway.

He has authored more than 30 technical publications, and holds nine U.S. and international patents. He has served on the program committees of ISSCC and other international conferences, and as a Technical Advisory Board member to EDA companies. Dr. Williams received his Bachelor's degree from the California Institute of Technology, and his PhD and Master's degrees in Electrical Engineering from Stanford University.